Detail výsledku

Program Generation Through a Probabilistic Constrained Grammar

ČEKAN, O.; PODIVÍNSKÝ, J.; KOTÁSEK, Z. Program Generation Through a Probabilistic Constrained Grammar. In Proceedings - 21st Euromicro Conference on Digital System Design, DSD 2018. Praha: IEEE Computer Society, 2018. p. 214-220. ISBN: 978-1-5386-7376-8.
Typ
článek ve sborníku konference
Jazyk
anglicky
Autoři
Čekan Ondřej, Ing., Ph.D., UPSY (FIT)
Podivínský Jakub, Ing., Ph.D., UPSY (FIT)
Kotásek Zdeněk, doc. Ing., CSc., UPSY (FIT), UTKO (FEKT)
Abstrakt

The paper introduces a probabilistic constrained grammar which is a newly formed grammar system for use in the area of test stimuli generation. The grammar extends the existing probabilistic context-free grammar and establishes constraints for grammar limitations. Stimuli obtained through the proposed principle are used in the functional verification of a RISC processor and coverage metrics are evaluated. The detailed information about the construction of an assembly code for processors is described, as well as the experimantal results with the implemented generator. Experiments show the expressive power of the probabilistic constrained grammar and achieved code coverage in the verification of the processor. The grammar system demonstrates that is very suitable for an assembly code generation and universal use in the area of test stimuli.

Klíčová slova

Probabilistic Constrained Grammar, Probabilistic
Context-Free Grammar, Stimulus, Constraint, Functional Verification

Rok
2018
Strany
214–220
Sborník
Proceedings - 21st Euromicro Conference on Digital System Design, DSD 2018
Konference
21st Euromicro Conference on Digital Systems Design
ISBN
978-1-5386-7376-8
Vydavatel
IEEE Computer Society
Místo
Praha
DOI
UT WoS
000537466600033
EID Scopus
BibTeX
@inproceedings{BUT155034,
  author="Ondřej {Čekan} and Jakub {Podivínský} and Zdeněk {Kotásek}",
  title="Program Generation Through a Probabilistic Constrained Grammar",
  booktitle="Proceedings - 21st Euromicro Conference on Digital System Design, DSD 2018",
  year="2018",
  pages="214--220",
  publisher="IEEE Computer Society",
  address="Praha",
  doi="10.1109/DSD.2018.00049",
  isbn="978-1-5386-7376-8",
  url="https://www.fit.vut.cz/research/publication/11709/"
}
Soubory
Projekty
IT4Innovations excellence in science, MŠMT, Národní program udržitelnosti II, LQ1602, zahájení: 2016-01-01, ukončení: 2020-12-31, ukončen
Pokročilé paralelní a vestavěné počítačové systémy, VUT, Vnitřní projekty VUT, FIT-S-17-3994, zahájení: 2017-03-01, ukončení: 2020-02-29, ukončen
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