Detail výsledku

Hardware Tools for Compression Algorithm Implementation

FRÝZA, T.; HANUS, S. Hardware Tools for Compression Algorithm Implementation. In Radioelektronika 2005 Conference Proceedings. Brno: UREL FEKT VUT v Brně, 2005. p. 53-56. ISBN: 80-214-2904-6.
Typ
článek ve sborníku konference
Jazyk
anglicky
Autoři
Frýza Tomáš, doc. Ing., Ph.D., UREL (FEKT)
Hanus Stanislav, prof. Ing., CSc., UREL (FEKT)
Abstrakt

This contribution deals with one of the hardware tools for implementation of a signal processing algorithms. A brief description of the TMS320C6000's digital signal processor is presented with an imaging developer's kit daughter card for capture and display image and video signals.

Klíčová slova

DSP, TMS320C6000, CPU, IDK, image/video processing, language C, algorithm implementation

Rok
2005
Strany
53–56
Sborník
Radioelektronika 2005 Conference Proceedings
Konference
RADIOELEKTRONIKA 2005
ISBN
80-214-2904-6
Vydavatel
UREL FEKT VUT v Brně
Místo
Brno
BibTeX 
@inproceedings{BUT16888,
  author="Tomáš {Frýza} and Stanislav {Hanus}",
  title="Hardware Tools for Compression Algorithm Implementation",
  booktitle="Radioelektronika 2005 Conference Proceedings",
  year="2005",
  pages="53--56",
  publisher="UREL FEKT VUT v Brně",
  address="Brno",
  isbn="80-214-2904-6"
}
Pracoviště
Ústav radioelektroniky (UREL)
Nahoru