Detail výsledku
An Overview of Research Activities in Digital Circuit Diagnosis and Benchmarking
Pečenka Tomáš, Ing., Ph.D., UPSY (FIT)
Strnadel Josef, Ing., Ph.D., UPSY (FIT)
Mika Daniel, Ing., Ph.D., UPSY (FIT)
Sekanina Lukáš, prof. Ing., Ph.D., UPSY (FIT)
In the paper, our research activities are described briefly. In the beginning, two different methodologies for the identification of registers to be included into the partial scan chain and principles of their implementation are described. One of them is based on the utilisation of genetic algorithms, the other one on the identification of feedback loops. Later, graphic tool for parallel i-paths analysis is presented. The visual representation described in the paper allows to develop a new methodology of a test controller. Benchmarks circuits are needed for verification above mentioned methodologies. At the end of this paper, it is demonstrated how evolutionary techniques can be used for the process of generating benchmark circuits.
I-path, Partial Scan, I-path Analysis, Benchmark Circuits
@inproceedings{BUT17565,
author="Zdeněk {Kotásek} and Tomáš {Pečenka} and Josef {Strnadel} and Daniel {Mika} and Lukáš {Sekanina}",
title="An Overview of Research Activities in Digital Circuit Diagnosis and Benchmarking",
booktitle="Proceedings of the Sixth Internation Scientific Conference Electronic Computers nad Informatics 2004",
year="2004",
pages="229--234",
publisher="The University of Technology Košice",
address="Košice",
isbn="80-8073-150-0",
url="http://www.fit.vutbr.cz/~pecenka/pubs/2004_eci.pdf"
}