Detail výsledku

Towards Hardware Verification

SMRČKA, A. Towards Hardware Verification. In Proceedings of the 11th Conference Student EEICT 2005. Volume 3. Brno: Faculty of Information Technology BUT, 2005. p. 668-672. ISBN: 978-80-214-2890-4.
Typ
článek ve sborníku konference
Jazyk
anglicky
Autoři
Smrčka Aleš, Ing., Ph.D., FIT (FIT), UITS (FIT)
Abstrakt

This paper gives an introduction to the approach of verification ofdiscrete timed hardware design. It roughly offers low-levelverification hand in hand
with high-level verification (which is described in more detail). Themain part of this paper takes an example of the top of viewverification of the lookup processor as a part of the COMBO cardsdeveloped by Liberouter project.

Klíčová slova

formal verification, hardware verification, abstract model verification, verification of implementation

URL
Rok
2005
Strany
668–672
Sborník
Proceedings of the 11th Conference Student EEICT 2005
Řada
Volume 3
Konference
STUDENT EEICT 2005
ISBN
978-80-214-2890-4
Vydavatel
Faculty of Information Technology BUT
Místo
Brno
BibTeX 
@inproceedings{BUT17966,
  author="Aleš {Smrčka}",
  title="Towards Hardware Verification",
  booktitle="Proceedings of the 11th Conference Student EEICT 2005",
  year="2005",
  series="Volume 3",
  pages="668--672",
  publisher="Faculty of Information Technology BUT",
  address="Brno",
  isbn="978-80-214-2890-4",
  url="http://www.fit.vutbr.cz/~smrcka/publications/thv05.pdf"
}
Projekty
Automatizované metody a nástroje pro vývoj spolehlivých paralelních a distribuovaných systémů, GAČR, Standardní projekty, GA102/04/0780, zahájení: 2004-01-01, ukončení: 2006-12-31, ukončen
Pracoviště
Ústav inteligentních systémů (UITS)
Nahoru