Detail výsledku
CSP-based Modeling of SM Architectures
The possibility of modeling of shared memory (SM) architectures usingcommunicating sequential processes (CSP) is described. The CSP-basedTransim tool enabled us to perform fair performance comparison oftheoretical PRAM model and the message passing (MP) model on one handand the real bus based SM systems with coherent caches on the other.Various memory update strategies, cache coherence protocols and busarbitration strategies have been examined, such as write through/writeback memory update, write invalidate/write update cache coherenceprotocols, and the most frequently used bus arbitration strategies(fair, priority-based, random). For comparison we have chosen parallelsolution of a large system of linear equations. Performance results arepresented and discussed.
Shared memory, CSP, Transim, performance comparison
@inproceedings{BUT192268,
author="Rudolf {Čejka} and Václav {Dvořák}",
title="CSP-based Modeling of SM Architectures",
booktitle="Proceedings of conference Computer Engineering and Informatics CE&I'99",
year="1999",
pages="163--168",
publisher="Faculty of Electrical Engineering and Informatics, University of Technology Košice",
address="Kosice - Herlany",
isbn="80-88922-05-4"
}