Detail výsledku

A Choice of SM/DM Parallel ANN Implementation for Embedded Applications

DVOŘÁK, V.; ČEJKA, R. A Choice of SM/DM Parallel ANN Implementation for Embedded Applications. Proceedings of the 7th IEEE International Conference on ECBS. Edinburgh, Scotland: IEEE Computer Society Press, 2000. p. 18-23. ISBN: 0-7695-604-6.
Typ
článek ve sborníku konference
Jazyk
anglicky
Autoři
Dvořák Václav, prof. Ing., DrSc.
Čejka Rudolf, Ing.
Abstrakt

This paper examines implementations of a multi-layer perceptron (MLP)on bus-based shared memory (SM) and on distributed memory (DM)multiprocessor systems. The goal has been to optimize HW and SWarchitectures in order to obtain the fastest response possible.Prototyping parallel MLP algorithms for up to 8 processing nodes withthe DM as well as SM memory was done using CSP-based TRANSIM tool. Theresults of prototyping MLPs of different sizes on various number ofprocessing nodes demonstrate the feasible speedups, efficiency and timeresponses for the given CPU speed, link speed or bus bandwidth.

Klíčová slova

Multi-layer perceptron, shared and distributed memory, modeling, communicating sequential processes

Rok
2000
Strany
18–23
Sborník
Proceedings of the 7th IEEE International Conference on ECBS
Konference
7th IEEE International Conference and Workshop ECBS'2000
ISBN
0-7695-604-6
Vydavatel
IEEE Computer Society Press
Místo
Edinburgh, Scotland
BibTeX 
@inproceedings{BUT192344,
  author="Václav {Dvořák} and Rudolf {Čejka}",
  title="A Choice of SM/DM Parallel ANN Implementation for Embedded Applications",
  booktitle="Proceedings of the 7th IEEE International Conference on ECBS",
  year="2000",
  pages="18--23",
  publisher="IEEE Computer Society Press",
  address="Edinburgh, Scotland",
  isbn="0-7695-604-6"
}
Výzkumné skupiny
Výzkumná skupina Superpočítačových technologií SC@FIT (VZ SC@FIT)
Pracoviště
Fakulta informačních technologií (FIT)
Nahoru