Detail výsledku

RTL Testability Analysis Based on Circuit Partitioning and Its Link with Professional Tool

ŠKARVADA, J.; HERRMAN, T.; KOTÁSEK, Z. RTL Testability Analysis Based on Circuit Partitioning and Its Link with Professional Tool. IEEE 8th Workshop on RTL and High Level Testing. Beijing: Institute of Computing Technology, Chinese Academy of Sciences, 2007. p. 175-181.
Typ
článek ve sborníku konference
Jazyk
anglicky
Autoři
Škarvada Jaroslav, Ing., Ph.D., UPSY (FIT)
Herrman Tomáš, Ing., Ph.D., UPSY (FIT)
Kotásek Zdeněk, doc. Ing., CSc., UPSY (FIT), UTKO (FEKT)
Abstrakt

The paper presents testability analysis method which is based on partitioning circuit under analysis (CUA) to testable blocks (TBs). A formal approach utilizing the concepts of discrete mathematics is used for this purpose. The partitioning CUA into TBs is further exploited for power consumption optimization during test application. Software tools which were developed during the research and integrated into the third party design tool are also described. Experimental results gained from applying the methodology on selected benchmarks and practical designs are demonstrated.

Klíčová slova

Testable block, power consumption estimation, test vectors generation, power consumption optimization.

URL
Rok
2007
Strany
175–181
Sborník
IEEE 8th Workshop on RTL and High Level Testing
Konference
IEEE 8th Workshop on RTL and High Level Testing
Vydavatel
Institute of Computing Technology, Chinese Academy of Sciences
Místo
Beijing
BibTeX 
@inproceedings{BUT26071,
  author="Jaroslav {Škarvada} and Tomáš {Herrman} and Zdeněk {Kotásek}",
  title="RTL Testability Analysis Based on Circuit Partitioning and Its Link with Professional Tool",
  booktitle="IEEE 8th Workshop on RTL and High Level Testing",
  year="2007",
  pages="175--181",
  publisher="Institute of Computing Technology, Chinese Academy of Sciences",
  address="Beijing",
  url="https://www.fit.vut.cz/research/publication/8487/"
}
Soubory
Projekty
Výzkum informačních technologií z hlediska bezpečnosti, MŠMT, Institucionální prostředky SR ČR (např. VZ, VC), MSM0021630528, zahájení: 2007-01-01, ukončení: 2013-12-31, řešení
Výzkumné skupiny
Výzkumná skupina Spolehlivé číslicové systémy (VZ DEPSYS)
Pracoviště
Ústav počítačových systémů (UPSY)
Nahoru