Detail výsledku

Reconfigurable Platform with Polymorphic Digital Gates and Partial Reconfiguration Feature

ŠIMEK, V.; RŮŽIČKA, R. Reconfigurable Platform with Polymorphic Digital Gates and Partial Reconfiguration Feature. In Proceedings on UKSim-AMSS 8th European Modelling Symposium on Mathematical Modelling and Computer Simulation. Pisa: IEEE Computer Society, 2014. p. 501-506. ISBN: 978-1-4799-7411-5.
Typ
článek ve sborníku konference
Jazyk
anglicky
Autoři
Abstrakt

Nowadays there can be evidently identified several important application fields, such as evolvable hardware, fault-tolerant architectures or circuit development, where the exploitation of partial reconfiguration principles may bring significant benefits. For conventional digital designs, a wide range of solutions comprising fine- to coarse-grained architectures are available on the market or e.g. as virtual reconfigurable circuits. But for polymorphic digital circuits (polymorphic digital circuit is able to perform more than one function, it typically has one stable structure for all functions and an actually performed function depends on a state of an environment) only one small-scale solution has been reported so far - the REPOMO. In this paper, main attention is given to the proposal of an approach with increased flexibility, where the resulting capabilities are demonstrated.

Klíčová slova

reconfigurable circuit, polymorphic electronics, partial reconfiguration

Rok
2014
Strany
501–506
Sborník
Proceedings on UKSim-AMSS 8th European Modelling Symposium on Mathematical Modelling and Computer Simulation
Konference
UKSim-AMSS 8th European Modelling Symposium on Mathematical Modelling and Computer Simulation
ISBN
978-1-4799-7411-5
Vydavatel
IEEE Computer Society
Místo
Pisa
DOI
UT WoS
000411856100085
EID Scopus
BibTeX
@inproceedings{BUT111576,
  author="Václav {Šimek} and Richard {Růžička}",
  title="Reconfigurable Platform with Polymorphic Digital Gates and Partial Reconfiguration Feature",
  booktitle="Proceedings on UKSim-AMSS 8th European Modelling Symposium on Mathematical Modelling and Computer Simulation",
  year="2014",
  pages="501--506",
  publisher="IEEE Computer Society",
  address="Pisa",
  doi="10.1109/EMS.2014.26",
  isbn="978-1-4799-7411-5"
}
Projekty
Architektury paralelních a vestavěných počítačových systémů, VUT, Vnitřní projekty VUT, FIT-S-14-2297, zahájení: 2014-01-01, ukončení: 2016-12-31, ukončen
Centrum excelence IT4Innovations, MŠMT, Operační program Výzkum a vývoj pro inovace, ED1.1.00/02.0070, zahájení: 2011-01-01, ukončení: 2015-12-31, ukončen
Nekonvenční návrhové techniky pro číslicové obvody s vlastní rekonfigurací: od materiálů k implementaci, MŠMT, COST CZ (2011-2017), LD14055, zahájení: 2014-05-05, ukončení: 2017-05-31, ukončen
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