Detail projektu

Architektury paralelních a vestavěných počítačových systémů

Období řešení: 1. 1. 2014 – 31. 12. 2016

Typ projektu: grant

Kód: FIT-S-14-2297

Agentura: Vysoké učení technické v Brně

Program: Vnitřní projekty VUT

Typ
grant
Abstrakt

Podstatou projektu je vytvoření nových metod návrhu, testování, rekonfigurace, optimalizace a adaptace vestavěných systémů a využítí zejména paralelního přístupu k řešení výpočetních problémů. Projekt integruje pracovníky a doktorandy Ústavu počítačových systémů FIT VUT v Brně tak, aby bylo možné řešit složité inženýrské problémy, které vyžadují experty v různých oblastech.

Řešitelé
Sekanina Lukáš, prof. Ing., Ph.D. (UPSY) – hlavní řešitel
Bartoš Václav, Ing., Ph.D.
Bidlo Michal, doc. Ing., Ph.D. (UPSY)
Crha Adam, Ing., Ph.D. (VZ POLY)
Čekan Ondřej, Ing., Ph.D. (UFYZ)
Dobai Roland, Ing., Ph.D. (CK-SZZ)
Drábek Vladimír, doc. Ing., CSc. (FIT)
Drahošová Michaela, Ing., Ph.D. (UPSY)
Dvořák Milan, Ing.
Dvořák Václav, prof. Ing., DrSc.
Fučík Otto, doc. Dr. Ing. (UPSY)
Hrbáček Radek, Ing., Ph.D. (VZ EHW)
Hyrš Martin, Ing., Ph.D.
Jaroš Jiří, prof. Ing., Ph.D. (UPSY)
Kadlček Filip, Ing., Ph.D.
Kekely Lukáš, Ing., Ph.D. (UPSY)
Kořenek Jan, doc. Ing., Ph.D. (UPSY)
Košař Vlastimil, Ing., Ph.D. (UPSY)
Kováčik Michal, Ing.
Martínek Tomáš, doc. Ing., Ph.D. (UPSY)
Matoušek Jiří, Ing., Ph.D. (UPSY)
Mičulka Lukáš, Ing., Ph.D.
Minařík Miloš, Ing., Ph.D. (VZ EHW)
Petrlík Jiří, Ing., Ph.D. (VZ EHW)
Podivínský Jakub, Ing., Ph.D. (UFYZ)
Růžička Richard, doc. Ing., Ph.D., MBA (UPSY)
Schwarz Josef, doc. Ing., CSc. (CK-SZZ)
Strnadel Josef, Ing., Ph.D. (UPSY)
Szurman Karel, Ing., Ph.D.
Šimek Václav, Ing. (UPSY)
Tesař Radek, Ing. (VZ POLY)
Tříska Vít, Ing.
Vašíček Zdeněk, doc. Ing., Ph.D. (UPSY)
Viktorin Jan, Ing. (FIT)
Zachariášová Marcela, Ing., Ph.D. (UPSY)
Zamba Martin, Ing. (VZ EHW)
Záň Drahoslav, Ing.
Publikační výsledky

2019

  • HUSA, J. Evoluční návrh kryptograficky silných booleovských funkcí. Sborník příspěvků PAD 2019. Doksy: Fakulta informačních technologií VUT v Brně, 2019. s. 59.ISBN: 978-80-88214-20-5. Detail
  • MATOUŠEK, J. Addressing Issues in Research on Packet Classification in Core Networks. Brno: Faculty of Information Technology BUT, 2019. 101 p. Detail

2017

  • ČEKAN, O.; KOTÁSEK, Z. Random Test Stimuli Generation Based on a Probabilistic Grammar. Proceedings of the 5th Prague Embedded Systems Workshop. Roztoky u Prahy: Faculty of Information Technology, Czech Technical University, 2017. p. 43.ISBN: 978-80-01-06178-7. Detail
  • GROCHOL, D.; SEKANINA, L. Comparison of Parallel Linear Genetic Programming Implementations. In Recent Advances in Soft Computing: Proceedings of the 22nd International Conference on Soft Computing (MENDEL 2016) held in Brno, Czech Republic, at June 8-10, 2016. Cham: Springer International Publishing, 2017. p. 64-76. ISBN: 978-3-319-58088-3. Detail
  • NIKL, V.; HRADECKÝ, M.; JAROŠ, J.; KELEČÉNI, J. The investigation of the ARMv7 and Intel Haswell architectures suitability for performance and energy-aware computing. In High Performance Computing. Lecture Notes in Computer Science. Cham: Springer International Publishing, 2017. p. 377-393. ISBN: 978-3-319-58666-3. Detail

2016

  • BARTOŠ, V.; KOŘENEK, J. Evaluating Reputation of Internet Entities. In Management and Security in the Age of Hyperconnectivity. Lecture Notes in Computer Science. Munich: Springer International Publishing, 2016. p. 132-136. ISBN: 978-3-319-39813-6. Detail
  • ČEKAN, O. Generování testovacích stimulů. Počítačové architektury a diagnostika PAD 2016. Bořetice - Kraví Hora: Fakulta informačních technologií VUT v Brně, 2016. s. 97.ISBN: 978-80-214-5376-0. Detail
  • ČEKAN, O.; KOTÁSEK, Z. Software-implemented Fault-Tolerant Program Generation. Proceedings of the 4th Prague Embedded Systems Workshop. Roztoky u Prahy: 2016. p. 13.ISBN: 978-80-01-05984-5. Detail
  • ČEKAN, O.; PODIVÍNSKÝ, J.; KOTÁSEK, Z. Random Stimuli Generation Based on a Stochastic Context-Free Grammar. In Proceedings of the 2016 International Conference on Field Programmable Technology. Xi'an: IEEE Computer Society, 2016. p. 295-296. ISBN: 978-1-5090-5602-6. Detail
  • GROCHOL, D. Evoluční hardware v síťových aplikacích. Počítačové architektury a diagnostika PAD 2016. Bořetice: Fakulta informačních technologií VUT v Brně, 2016. s. 57.ISBN: 978-80-214-5376-0. Detail
  • HRBÁČEK, R.; MRÁZEK, V.; VAŠÍČEK, Z. Automatic Design of Approximate Circuits by Means of Multi-Objective Evolutionary Algorithms. In Proceedings of the 11th International Conference on Design & Technology of Integrated Systems in Nanoscale Era. Istanbul: Istanbul Sehir University, 2016. p. 239-244. ISBN: 978-1-5090-0335-8. Detail
  • HYRŠ, M.; SCHWARZ, J. Kopulové EDA algoritmy. Počítačové architektury & diagnostika PAD 2016. Bořetice: Fakulta informačních technologií VUT v Brně, 2016. s. 105.ISBN: 978-80-214-5376-0. Detail
  • HYRŠ, M.; SCHWARZ, J. Advanced Parallel Copula Based EDA. In 2016 IEEE Symposium Series on Computational Intelligence. Athens: Institute of Electrical and Electronics Engineers, 2016. p. 1-8. ISBN: 978-1-5090-4239-5. Detail
  • KOŘENEK, J.; VIKTORIN, J. Packet Processing on FPGA SoC with DPDK. In 26th International Conference on Field-Programmable Logic and Applications. Lausanne: École Polytechnique Fédérale de Lausanne, 2016. p. 578-579. ISBN: 978-2-8399-1844-2. Detail
  • KOŠAŘ, V.; KOŘENEK, J. Dynamically Reconfigurable Architecture with Atomic Configuration Updates for Flexible Regular Expressions Matching in FPGA. In Proceedings of The 19th Euromicro Conference on Digital Systems Design. Limassol: IEEE Computer Society, 2016. p. 591-598. ISBN: 978-1-5090-2816-0. Detail
  • KOTÁSEK, Z.; PODIVÍNSKÝ, J. Verification of Robot Controller for Evaluating Impacts of Faults in Electro-mechanical Systems. Proceedings of the 4th Prague Embedded Systems Workshop. Roztoky u Prahy: 2016. 1 p. Detail
  • KRČMA, M.; KOTÁSEK, Z.; LOJDA, J.; KAŠTIL, J. Comparison of FPNNs Approximation Capabilities. Proceedings of the Work in progress Session held in connection with DSD 2016. Limassol: Johannes Kepler University Linz, 2016. p. 1.ISBN: 978-3-902457-46-2. Detail
  • LOJDA, J.; PODIVÍNSKÝ, J.; KRČMA, M.; KOTÁSEK, Z. HLS-based Fault Tolerance Approach for SRAM-based FPGAs. In Proceedings of the 2016 International Conference on Field Programmable Technology. Xi'an: IEEE Computer Society, 2016. p. 301-302. ISBN: 978-1-5090-5602-6. Detail
  • MATOUŠEK, D.; KOŘENEK, J.; PUŠ, V. High-speed Regular Expression Matching with Pipelined Automata. In Proceedings of the 2016 International Conference on Field Programmable Technology. Xi'an: IEEE Computer Society, 2016. p. 93-100. ISBN: 978-1-5090-5602-6. Detail
  • MRÁZEK, V. Evoluční snižování příkonu: Od obvodů na úrovni tranzistorů po neuronové sítě na čipu. Počítačové architektury a diagnostika PAD 2016. Bořetice: Fakulta informačních technologií VUT v Brně, 2016. s. 61.ISBN: 978-80-214-5376-0. Detail
  • MRÁZEK, V.; VAŠÍČEK, Z. Automatic Design of Arbitrary-Size Approximate Sorting Networks with Error Guarantee. In Power and Timing Modeling, Optimization and Simulation (PATMOS), 2016 26rd International Workshop on. Bremen: Institute of Electrical and Electronics Engineers, 2016. p. 221-228. ISBN: 978-1-5090-0733-2. Detail
  • NIKL, V. High Performance Computing on Low Power Devices. Computer achitectures and diagnostics 2016. Brno: Faculty of Information Technology BUT, 2016. p. 81.ISBN: 978-80-214-5376-0. Detail
  • PODIVÍNSKÝ, J. Funkční verifikace jako nástroj pro sledování vlivu poruch na elektro-mechanický systém. Počítačové architektury a diagnostika PAD 2016. Bořetice - Kraví Hora: Fakulta informačních technologií VUT v Brně, 2016. s. 101.ISBN: 978-80-214-5376-0. Detail
  • PODIVÍNSKÝ, J.; ČEKAN, O.; LOJDA, J.; KOTÁSEK, Z. Functional Verification as a Tool for Monitoring Impact of Faults in SRAM-based FPGAs. In Proceedings of the 2016 International Conference on Field Programmable Technology. Xi'an: IEEE Computer Society, 2016. p. 293-294. ISBN: 978-1-5090-5602-6. Detail
  • PODIVÍNSKÝ, J.; ČEKAN, O.; LOJDA, J.; KOTÁSEK, Z. Verification of Robot Controller for Evaluating Impacts of Faults in Electro-mechanical Systems. In Proceedings of the 19th Euromicro Conference on Digital Systems Design. Limassol: IEEE Computer Society, 2016. p. 487-494. ISBN: 978-1-5090-2816-0. Detail
  • RIŠA, M. Scheduling and Synchronization on Multicores. Sborník příspěvků Česko-slovenského semináře pro studenty doktorského studia Počítačové architektury & diagnostika. Brno: Faculty of Information Technology BUT, 2016. p. 10.ISBN: 978-80-214-5376-0. Detail
  • SEKANINA, L.; KAPUSTA, V. Visualisation and Analysis of Genetic Records Produced by Cartesian Genetic Programming. In GECCO'16 Companion. New York: Association for Computing Machinery, 2016. p. 1411-1418. ISBN: 978-1-4503-4323-7. Detail
  • STRNADEL, J. Modeling and Analysis of Fault-Tolerant Systems by Means of UPPAAL SMC: Method and Benefits. Informal Proceedings of the 2016 IEEE 19th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS). Bratislava: Slovak University of Technology in Bratislava, 2016. p. 32.ISBN: 978-80-8086-256-5. Detail
  • STRNADEL, J.; RIŠA, M. On Analysis of Software Interrupt Limiters for Embedded Systems by Means of UPPAAL SMC. In Proceedings of the 24th Austrian Workshop on Microelectronics. Villach: IEEE Computer Society Press, 2016. p. 45-50. ISBN: 978-1-5090-1040-0. Detail
  • SZURMAN, K.; MIČULKA, L.; KOTÁSEK, Z. Towards a State Synchronization Methodology for Recovery Process after Partial Reconfiguration of Fault Tolerant Systems. Proceedings of the 4th Prague Embedded Systems Workshop. Roztoky u Prahy: 2016. 1 p. ISBN: 978-80-01-05984-5. Detail
  • ŠIMEK, V.; TESAŘ, R.; RŮŽIČKA, R.; CRHA, A. Modelling and Physical Implementation of Ambipolar Components Based on Organic Materials. In Proceedings of the 28th International Conference on Microelectronics (ICM 2016). Cairo: IEEE Circuits and Systems Society, 2016. p. 341-344. ISBN: 978-1-5090-5721-4. Detail
  • VAVERKA, F. Case Study on Multi-domain Decomposition of k-Wave Simulation Framework. Computer achitectures and diagnostics 2016. Brno: Faculty of Information Technology BUT, 2016. p. 37.ISBN: 978-80-214-5376-0. Detail
  • ZACHARIÁŠOVÁ, M.; KEKELYOVÁ, M.; KOTÁSEK, Z. Regression Test Suites Optimization for Application-specific Instruction-set Processors and Their Use for Dependability Analysis. In Proceedings of the 19th Euromicro Conference on Digital Systems Design. Limassol Cyprus: IEEE Computer Society, 2016. p. 380-387. ISBN: 978-1-5090-2816-0. Detail

2015

  • BARTOŠ, V. Using Application-Aware Flow Monitoring for SIP Fraud Detection. In Intelligent Mechanisms for Network Configuration and Security. Lecture Notes in Computer Science. Ghent: Springer International Publishing, 2015. p. 87-99. ISBN: 978-3-319-20033-0. Detail
  • ČEKAN, O. Principy generování verifikačních stimulů. Počítačové architektury a diagnostika PAD 2015. Zlín: Fakulta aplikované informatiky, Univerzita Tomáše Bati ve Zlíně, 2015. s. 13.ISBN: 978-80-7454-522-1. Detail
  • ČEKAN, O.; PODIVÍNSKÝ, J.; KOTÁSEK, Z. Software Fault Tolerance: the Evaluation by Functional Verification. In Proceedings of the 18th Euromicro Conference on Digital Systems Design. Funchal: IEEE Computer Society, 2015. p. 284-287. ISBN: 978-1-4673-8035-5. Detail
  • ČEKAN, O.; ZACHARIÁŠOVÁ, M.; KOTÁSEK, Z. Universal Pseudo-random Generation of Assembler Codes for Processors. Proceedings of The Third Workshop on Manufacturable and Dependable Multicore Architectures at Nanoscale. Grenoble: COST, European Cooperation in Science and Technology, 2015. p. 70. Detail
  • DOBAI, R.; SEKANINA, L. Low-Level Flexible Architecture with Hybrid Reconfiguration for Evolvable Hardware. ACM Transactions on Reconfigurable Technology and Systems, 2015, vol. 8, iss. 3, p. 1-24. ISSN: 1936-7406. Detail
  • DRAHOŠOVÁ, M.; HULVA, J.; SEKANINA, L. Indirectly Encoded Fitness Predictors Coevolved with Cartesian Programs. In Genetic Programming. Lecture Notes in Computer Science. Berlin: Springer International Publishing, 2015. p. 113-125. ISBN: 978-3-319-16500-4. Detail
  • GROEN, D.; CHACRA, D.; NASH, R.; JAROŠ, J.; BERNABEU, M.; COVENEY, P. Weighted Decomposition in High-Performance Lattice-Boltzmann Simulations: Are Some Lattice Sites More Equal than Others?. In Solving Software Challengesfor Exascale. Lecture Notes in Computer Science. Stockholm: Springer Verlag, 2015. p. 28-38. ISBN: 978-3-319-15975-1. Detail
  • GROCHOL, D.; SEKANINA, L.; ŽÁDNÍK, M.; KOŘENEK, J. A Fast FPGA-Based Classification of Application Protocols Optimized Using Cartesian GP. In Applications of Evolutionary Computation, 18th European Conference. Lecture Notes in Computer Science. Berlin: Springer International Publishing, 2015. p. 67-78. ISBN: 978-3-319-16548-6. Detail
  • HYRŠ, M.; SCHWARZ, J. Elliptical and Archimedean Copulas in Estimation of Distribution Algorithm with Model Migration. In Proceedings of the 7th International Joint Conference on Computational Intelligence (IJCCI 2015). Lisbon: SciTePress - Science and Technology Publications, 2015. p. 212-219. ISBN: 978-989-758-157-1. Detail
  • HYRŠ, M.; SCHWARZ, J. Elliptical and Archimedean Copulas in Estimation of Distribution Algorithm. In MENDEL 2015 21st International Conference on Soft Computing. Brno: Faculty of Mechanical Engineering BUT, 2015. p. 19-26. ISBN: 978-80-214-4984-8. Detail
  • JAROŠ, J.; MAREK, J.; MENŠÍK, P. Optimisation of Water Management Systems Using a GPU-Accelerated Differential Evolution. In Proceedings - 2015 IEEE Symposium Series on Computational Intelligence, SSCI 2015. Cape Town: IEEE Computer Society, 2015. p. 1727-1734. ISBN: 978-1-4799-7560-0. Detail
  • JAROŠ, J.; NIKL, V.; TREEBY, B. Large-scale Ultrasound Simulations Using the Hybrid OpenMP/MPI Decomposition. Proceedings of the 3rd International Conference on Exascale Applications and Software. Edinburgh: Association for Computing Machinery, 2015. p. 115.ISBN: 978-0-9926615-1-9. Detail
  • KEKELY, L.; KUČERA, J.; PUŠ, V.; KOŘENEK, J.; VASILAKOS, A. Software Defined Monitoring of Application Protocols. IEEE TRANSACTIONS ON COMPUTERS, 2015, vol. 65, iss. 2, p. 615-626. ISSN: 0018-9340. Detail
  • KEKELYOVÁ, M.; ZACHARIÁŠOVÁ, M.; KOTÁSEK, Z.; HRUŠKA, T. Application of Evolutionary Algorithms for Optimization of Regression Suites. In IEEE 18th International Symposium on Design and Diagnostics of Electronic Circuits and Systems. Belgrade: IEEE Computer Society, 2015. p. 91-94. ISBN: 978-1-4799-6779-7. Detail
  • KOŠAŘ, V.; KOŘENEK, J. Towards Efficient Field Programmable Pattern Matching Array. In Proceedings of the 18th Euromicro Conference on Digital Systems Design. Funchal: IEEE Computer Society, 2015. p. 1-8. ISBN: 978-1-4673-8035-5. Detail
  • KRČMA, M. FPNN - neuronové sítě v FPGA. Počítačové architektury a diagnostika PAD 2015. Zlín: Univerzita Tomáše Bati ve Zlíně, 2015. s. 81.ISBN: 978-80-7454-522-1. Detail
  • KRČMA, M.; KAŠTIL, J.; KOTÁSEK, Z. Mapping trained neural networks to FPNNs. In IEEE 18th International Symposium on Design and Diagnostics of Electronic Circuits and Systems. Belgrade: IEEE Computer Society, 2015. p. 157-160. ISBN: 978-1-4799-6779-7. Detail
  • KRČMA, M.; KOTÁSEK, Z.; KAŠTIL, J. Fault Tolerant Field Programmable Neural Networks. In 1st IEEE Nordic Circuits and Systems (NORCAS) Conference. Oslo: IEEE Computer Society, 2015. p. 1-4. ISBN: 978-1-4673-6575-8. Detail
  • MRÁZEK, V. Evoluční návrh nízkopříkonových obvodů. Počítačové architektury a diagnostika PAD 2015. Zlín: Fakulta aplikované informatiky, Univerzita Tomáše Bati ve Zlíně, 2015. s. 1.ISBN: 978-80-7454-522-1. Detail
  • NIKL, V. High Performance Computing on Low Power Devices. Počítačové architektury a diagnostika 2015. Zlín: Faculty of Applied Informatics, Tomas Bata University in Zlín, 2015. p. 37.ISBN: 978-80-7454-522-1. Detail
  • PETRLÍK, J.; SEKANINA, L. Towards Robust and Accurate Traffic Prediction Using Parallel Multiobjective Genetic Algorithms and Support Vector Regression. In 2015 IEEE 18th International Conference on Intelligent Transportation Systems. Los Alamitos: IEEE Computer Society, 2015. p. 2231-2236. ISBN: 978-1-4673-6596-3. Detail
  • PODIVÍNSKÝ, J.; ČEKAN, O.; ZACHARIÁŠOVÁ, M.; KOTÁSEK, Z. The Evaluation Platform for Testing Fault-Tolerance Methodologies in Electro-mechanical Applications. Microprocessors and Microsystems, 2015, vol. 39, iss. 8, p. 1215-1230. ISSN: 0141-9331. Detail
  • PODIVÍNSKÝ, J.; ZACHARIÁŠOVÁ, M.; ČEKAN, O.; KOTÁSEK, Z. FPGA Prototyping and Accelerated Verification of ASIPs. In IEEE 18th International Symposium on Design and Diagnostics of Electronic Circuits and Systems. Belgrade: IEEE Computer Society, 2015. p. 145-148. ISBN: 978-1-4799-6780-3. Detail
  • PODIVÍNSKÝ, J.; ZACHARIÁŠOVÁ, M.; KOTÁSEK, Z. Radiation Impact on Mechanical Application Driven by FPGA-based Controller. Proceedings of The Fourth Workshop on Manufacturable and Dependable Multicore Architectures at Nanoscale. Grenoble: COST, European Cooperation in Science and Technology, 2015. p. 13. Detail
  • SEKANINA, L. Principles and Applications of Polymorphic Circuits. In Evolvable Hardware - From Practice to Application. Berlin: Springer Verlag, 2015. p. 209.ISBN: 978-3-662-44615-7. Detail
  • SLANÝ, K. Cartesian Genetic Programming in a Changing Environment. In Proceedings of the 7th International Joint Conference on Computational Intelligence (IJCCI 2015). Lisbon: SciTePress - Science and Technology Publications, 2015. p. 204-211. ISBN: 978-989-758-157-1. Detail
  • STRNADEL, J. Comparison of Generally Applicable Mechanisms for Preventing Embedded Event-Driven Real-Time Systems from Interrupt Overloads. In Proceedings of the 2015 4th Eastern European Regional Conference on the Engineering of Computer Based Systems. Brno: Brno University of Technology, 2015. p. 39-44. ISBN: 978-1-4673-7967-0. Detail
  • ŠIMEK, V.; RŮŽIČKA, R.; CRHA, A. Toward Efficient Synthesis Method of Multifunctional Logic Circuits. In Proceedings of the 27th International Conference on Microelectronics (ICM 2015). Casablanca: IEEE Computer Society, 2015. p. 21-24. ISBN: 978-1-4673-8759-0. Detail
  • TOMAN, J.; HRBÁČEK, R.; SINGULE, V. Redundant Control Algorithm for a Brushless DC Motor. In EDPE 2015 Proceedings of the 18th International Conference on Electrical Drives and Power Electronics. Košice: The University of Technology Košice, 2015. p. 117-123. ISBN: 978-1-4673-7376-0. Detail
  • VAŠÍČEK, Z.; SEKANINA, L. Evolutionary Approach to Approximate Digital Circuits Design. IEEE transactions on evolutionary computation, 2015, vol. 19, iss. 3, p. 432-444. ISSN: 1089-778X. Detail
  • ZACHARIÁŠOVÁ, M.; KOTÁSEK, Z. Automation and Optimization of Coverage-driven Verification. In Proceedings of the 18th Euromicro Conference on Digital Systems Design. Funchal: IEEE Computer Society, 2015. p. 87-94. ISBN: 978-1-4673-8035-5. Detail

2014

  • ČEKAN, O. Universal Generation of Test Vectors for Functional Verification. Počítačové architektury a diagnostika 2014. Liberec: Liberec University of Technology, 2014. p. 44.ISBN: 978-80-7494-027-9. Detail
  • ČEKAN, O.; ZACHARIÁŠOVÁ, M.; KOTÁSEK, Z. Solving of Constraint Satisfaction Problem. Proceedings of the 20th Conference STUDENT EEICT 2014. Volume 3. Brno: Faculty of Information Technology BUT, 2014. p. 291.ISBN: 978-80-214-4924-4. Detail
  • DRAHOŠOVÁ, M.; KOMJÁTHY, G.; SEKANINA, L. Towards Compositional Coevolution in Evolutionary Circuit Design. In 2014 IEEE International Conference on Evolvable Systems Proceedings. Piscataway: Institute of Electrical and Electronics Engineers, 2014. p. 157-164. ISBN: 978-1-4799-4479-8. Detail
  • DVOŘÁK, M.; KOŘENEK, J. Low Latency Book Handling in FPGA for High Frequency Trading. In 17th IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems. Warszawa: IEEE Computer Society, 2014. p. 175-178. ISBN: 978-1-4799-4558-0. Detail
  • HYRŠ, M.; SCHWARZ, J. Estimation of distribution algorithm with copula probabilistic model: A short introduction. In Proceedings of 20th international conference of softcomputing. Brno: Faculty of Mechanical Engineering BUT, 2014. p. 71-76. ISBN: 978-80-214-4984-8. Detail
  • HYRŠ, M.; SCHWARZ, J. Multivariate Gaussian Copula in Estimation of Distribution Algorithm with Model Migration. In 2014 IEEE Symposium on Foundations of Computational Intelligence (FOCI) Proceedings. Piscataway: Institute of Electrical and Electronics Engineers, 2014. p. 114-119. ISBN: 978-1-4799-4492-7. Detail
  • JAROŠ, J.; TYRALA, R. GPU-accelerated Evolutionary Design of the Complete Exchange Communication on Wormhole Networks. In GECCO 2014 - Proceedings of the 2014 Genetic and Evolutionary Computation Conference. New York, NY: Association for Computing Machinery, 2014. p. 1023-1030. ISBN: 978-1-4503-2662-9. Detail
  • KEKELY, L. Software Defined Monitoring: Nový prístup k monitorovaniu vysokorýchlostných počítačových sietí. Počítačové architektury a diagnostika 2014. Liberec: Liberec University of Technology, 2014. s. 74.ISBN: 978-80-7494-027-9. Detail
  • KEKELY, L.; PUŠ, V.; BENÁČEK, P.; KOŘENEK, J. Trade-offs and Progressive Adoption of FPGA Acceleration in Network Traffic Monitoring. In 2014 24th International Conference on Field Programmable Logic and Applications (FPL 2014). Munich: IEEE Circuits and Systems Society, 2014. p. 264-267. ISBN: 978-3-00-044645-0. Detail
  • KEKELY, L.; PUŠ, V.; KOŘENEK, J. Software Defined Monitoring of Application Protocols. In Proceedings of IEEE INFOCOM 2014 - IEEE Conference on Computer Communications. Toronto: IEEE Computer Society, 2014. p. 1725-1733. ISBN: 978-1-4799-3360-0. Detail
  • KEKELY, L.; ŽÁDNÍK, M.; MATOUŠEK, J.; KOŘENEK, J. Fast Lookup for Dynamic Packet Filtering in FPGA. In Proceedings of the 2014 IEEE 17th International Symposium on Design and Diagnostics of Electronic Circuits and Systems, DDECS 2014. Warszawa: IEEE Computer Society, 2014. p. 219-222. ISBN: 978-1-4799-4558-0. Detail
  • KOŠAŘ, V.; KOŘENEK, J. Multi-Stride NFA-Split Architecture for Regular Expression Matching Using FPGA. Proceedings of the 9th Doctoral Workshop on Mathematical and Engineering Methods in Computer Science. Brno: NOVPRESS s.r.o., 2014. p. 77.ISBN: 978-80-214-5022-6. Detail
  • KOŠAŘ, V.; KOŘENEK, J. On NFA-Split Architecture Optimizations. In 2014 IEEE 17th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS). Warsaw: IEEE Computer Society, 2014. p. 274-277. ISBN: 978-1-4799-4558-0. Detail
  • KOTÁSEK, Z.; MIČULKA, L. Generic Partial Dynamic Reconfiguration Controller for Transient and Permanent Fault Mitigation in Fault Tolerant Systems Implemented Into FPGA. In 17th IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems. Warszawa: IEEE Computer Society, 2014. p. 171-174. ISBN: 978-0-7695-5074-9. Detail
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