Detail výsledku

The Evaluation Platform for Testing Fault-Tolerance Methodologies in Electro-mechanical Applications

PODIVÍNSKÝ, J.; ČEKAN, O.; ZACHARIÁŠOVÁ, M.; KOTÁSEK, Z. The Evaluation Platform for Testing Fault-Tolerance Methodologies in Electro-mechanical Applications. In 17th Euromicro Conference on Digital Systems Design. Verona: IEEE Computer Society, 2014. p. 312-319. ISBN: 978-1-4799-5793-4.
Typ
článek ve sborníku konference
Jazyk
anglicky
Autoři
Podivínský Jakub, Ing., Ph.D., UPSY (FIT)
Čekan Ondřej, Ing., Ph.D., UPSY (FIT)
Zachariášová Marcela, Ing., Ph.D., UPSY (FIT)
Kotásek Zdeněk, doc. Ing., CSc., UPSY (FIT), UTKO (FEKT)
Abstrakt

The aim of this paper is to present a new platform for estimating the fault-tolerance quality of electro-mechanical applications based on FPGAs. We demonstrate one working example of such EM application that was evaluated using our platform: the mechanical robot and its electronic controller in an FPGA. Different building blocks of the electronic robot controller allow to model different effects of faults on the whole mission of the robot (searching a path in a maze). In the experiments, the mechanical robot is simulated in the simulation environment, where the effects of faults injected into its controller can be seen. In this way, it is possible to differentiate between the fault that causes the failure of the system and the fault that only decreases the performance. Further extensions of the platform focus on the interconnection of the platform with the functional verification environment working directly in FPGA that allows automation and speed-up of checking the correctness of the system after the injection of faults.

Klíčová slova

Fault Tolerance, Electro-mechanical Systems, Fault Injection, Single Event Upset, Functional verification

Rok
2014
Strany
312–319
Sborník
17th Euromicro Conference on Digital Systems Design
Konference
17th Euromicro Conference on Digital Systems Design: Architectures, Methods and Tools
ISBN
978-1-4799-5793-4
Vydavatel
IEEE Computer Society
Místo
Verona
DOI
UT WoS
000358409000041
EID Scopus
BibTeX
@inproceedings{BUT111616,
  author="Jakub {Podivínský} and Ondřej {Čekan} and Marcela {Zachariášová} and Zdeněk {Kotásek}",
  title="The Evaluation Platform for Testing Fault-Tolerance Methodologies in Electro-mechanical Applications",
  booktitle="17th Euromicro Conference on Digital Systems Design",
  year="2014",
  pages="312--319",
  publisher="IEEE Computer Society",
  address="Verona",
  doi="10.1109/DSD.2014.57",
  isbn="978-1-4799-5793-4",
  url="https://www.fit.vut.cz/research/publication/10665/"
}
Soubory
Projekty
Architektury paralelních a vestavěných počítačových systémů, VUT, Vnitřní projekty VUT, FIT-S-14-2297, zahájení: 2014-01-01, ukončení: 2016-12-31, ukončen
Centrum excelence IT4Innovations, MŠMT, Operační program Výzkum a vývoj pro inovace, ED1.1.00/02.0070, zahájení: 2011-01-01, ukončení: 2015-12-31, ukončen
Metodiky pro návrh systémů odolných proti poruchám do rekonfigurovatelných architektur - vývoj, implementace a verifikace, MŠMT, COST CZ (2011-2017), LD12036, zahájení: 2012-03-01, ukončení: 2015-11-30, ukončen
Metodiky pro návrh systémů odolných proti poruchám do rekonfigurovatelných architektur - vývoj, implementace a verifikace, MŠMT, COST, COST IC1103, zahájení: 2011-06-15, ukončení: 2015-12-31, ukončen
Pracoviště
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