Detail výsledku
Towards a State Synchronization Methodology for Recovery Process after Partial Reconfiguration of Fault Tolerant Systems
Mičulka Lukáš, Ing., Ph.D.
Kotásek Zdeněk, doc. Ing., CSc., UPSY (FIT), UTKO (FEKT)
Thepaper describes essential points of new methodology for design, implementationand evaluation of state synchronization methods for fault tolerant system implementedon SRAM FPGA after its recovery through partial dynamic reconfiguration.Essential problems which must be satisfied by each synchronization method aredescribed. Then, dynamic and static parameters of synchronization methods whichcan have direct effect on target fault tolerant system are defined. Basic principles of presented methodology areverified on implementation of specific synchronization method for reconfigurablefault tolerant CAN bus control system.
state synchronization, recovery, partial dynamic reconfiguration, fault tolerance, FPGA
@inproceedings{BUT111682,
author="Karel {Szurman} and Lukáš {Mičulka} and Zdeněk {Kotásek}",
title="Towards a State Synchronization Methodology for Recovery Process after Partial Reconfiguration of Fault Tolerant Systems",
booktitle="9th IEEE International Conference on Computer Engineering and Systems",
year="2014",
pages="231--236",
publisher="IEEE Computer Society",
address="Káhira",
doi="10.1109/ICCES.2014.7030963",
isbn="978-1-4799-6594-6"
}
Centrum excelence IT4Innovations, MŠMT, Operační program Výzkum a vývoj pro inovace, ED1.1.00/02.0070, zahájení: 2011-01-01, ukončení: 2015-12-31, ukončen
Metodiky pro návrh systémů odolných proti poruchám do rekonfigurovatelných architektur - vývoj, implementace a verifikace, MŠMT, COST CZ (2011-2017), LD12036, zahájení: 2012-03-01, ukončení: 2015-11-30, ukončen