Detail výsledku

28th International Symposium on Design and Diagnostics of Electronic Circuits & Systems

BOSIO, A.; BERNARDI, P.; TRAIOLA, M.; MRÁZEK, V. 28th International Symposium on Design and Diagnostics of Electronic Circuits & Systems. Lyon: Institute of Electrical and Electronics Engineers, 2025. 168 p. ISBN: 979-8-3315-2801-0.
Typ
konferenční sborník (ne stať)
Jazyk
anglicky
Autoři
BOSIO, A.
BERNARDI, P.
TRAIOLA, M.
Mrázek Vojtěch, Ing., Ph.D., UPSY (FIT)
Abstrakt

This proceedings contains reviewed papers accepted for publication and
presentation at the 28th International Symposium on Design and Diagnostics of
Electronic Circuits and Systems (DDECS2025). Since its origins in 1997 DDECS has
continued to provide a forum for exchanging ideas, discussing research results,
and presenting practical applications in the areas of design, test, and diagnosis
of electronic circuits and systems.

Klíčová slova

electronic circuit, design, test, design method, digital circuit, analog circuit

Rok
2025
Strany
168
Konference
International Symposium on Design and Diagnostics of Electronic Circuits and Systems
ISBN
979-8-3315-2801-0
Vydavatel
Institute of Electrical and Electronics Engineers
Místo
Lyon
DOI
10.1109/DDECS63720.2025
BibTeX 
@proceedings{BUT197714,
  editor="BOSIO, A. and BERNARDI, P. and TRAIOLA, M. and MRÁZEK, V.",
  title="28th International Symposium on Design and Diagnostics of Electronic Circuits & Systems",
  year="2025",
  pages="168",
  publisher="Institute of Electrical and Electronics Engineers",
  address="Lyon",
  doi="10.1109/DDECS63720.2025",
  isbn="979-8-3315-2801-0"
}
Projekty
Application-specific HW/SW architectures and their applications, VUT, Vnitřní projekty VUT, FIT-S-23-8141, zahájení: 2023-03-01, ukončení: 2026-02-28, řešení
Výzkumné skupiny
Výzkumná skupina Evolvable Hardware (VZ EHW)
Pracoviště
Ústav počítačových systémů (UPSY)
Nahoru