Detail výsledku

Design and Optimization of ColdFire CPU Arithmetic Logical Unit

ADAMEC, F.; FRÝZA, T. Design and Optimization of ColdFire CPU Arithmetic Logical Unit. In Proceedings of 16th International Conference Mixed Design of Integrated Circuits and Systems. Lodz (Poland): 2009. p. 699-702. ISBN: 978-83-928756-0-4.
Typ
článek ve sborníku konference
Jazyk
anglicky
Autoři
Adamec Filip, Ing., UREL (FEKT)
Frýza Tomáš, doc. Ing., Ph.D., UREL (FEKT)
Abstrakt

This article describes design of ColdFire microprocessor ALU (Arithmetic Logical Unit) in VHDL language and presents an optimization to obtain maximum performance in Xilinx Virtex IV FPGA. The basic function of ALU is explained. There are described the instructions which any ALU must handle and some possibility how to design it. The advantages and disadvantages of performance are obtained as well.

Klíčová slova

Arithmetic Logical Unit; VHDL; FPGA; instructions

Rok
2009
Strany
699–702
Sborník
Proceedings of 16th International Conference Mixed Design of Integrated Circuits and Systems
Konference
16th International Conference Mixed Design of Integrated Circuits and Systems (MIXDES 2009)
ISBN
978-83-928756-0-4
Místo
Lodz (Poland)
UT WoS
000275900300137
BibTeX 
@inproceedings{BUT32734,
  author="Filip {Adamec} and Tomáš {Frýza}",
  title="Design and Optimization of ColdFire CPU Arithmetic Logical Unit",
  booktitle="Proceedings of 16th International Conference Mixed Design of Integrated Circuits and Systems",
  year="2009",
  pages="699--702",
  address="Lodz (Poland)",
  isbn="978-83-928756-0-4"
}
Pracoviště
Ústav radioelektroniky (UREL)
Nahoru