Detail výsledku

NAND/NOR Gate Polymorphism in Low Temperature Environment

RŮŽIČKA, R.; ŠIMEK, V. NAND/NOR Gate Polymorphism in Low Temperature Environment. Proceedings of the 2012 IEEE 15th International Symposium on Design and Diagnostics of Electronic Circuits & Systems. Tallinn: Institute of Electrical and Electronics Engineers, 2012. p. 34-37. ISBN: 978-1-4673-1185-4.
Typ
článek ve sborníku konference
Jazyk
anglicky
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Abstrakt

The fundamental aspect behind this paper is focused on behaviour of polymorphic digital circuits in potentially harsh operating environment. Unlike conventional CMOS-based circuits, the area of polymorphic electronics takes and an advantage of inherently built-in features that open up the possibility for on-the-fly adjustment of a particular circuit function with respect to the surrounding environment. The most prevalent benefit here is connected with the fact that space-efficient circuit implementation can be achieved due to the adoption of polymorphic principles and, thus, eliminate the need for an additional function change controller. From a conceptual point of view, key attention is given to a set of experiments which were conducted with the aim to evaluate the influence of wide temperature range (with special interest in low temperatures domain) in case of reconfigurable chip with dedicated polymorphic gates. The experimental setup was based around reconfigurable polymorphic chip REPOMO32, which is primarily designed to be configured (in addition to the configuration bit stream) by means of using the level of power supply voltage (Vdd), and carrier board with all necessary capabilities for temperature measurement up to -40C below zero boundary and its response analysis. Experiments clearly indicate that polymorphic gates in the chip can be easily controlled (in terms of functionality) not only by Vdd, but also by temperature within operating environment. The obtained results also prove that the physical design of the REPOMO32 chip is robust enough under wide range of operating temperature, the chip can also be used for future designs of digital polymorphic circuits controlled by temperature.

Klíčová slova

Polymorphic electronics, temperature-awareness, polymorphic gate, multifunctional gate

Rok
2012
Strany
34–37
Sborník
Proceedings of the 2012 IEEE 15th International Symposium on Design and Diagnostics of Electronic Circuits & Systems
Konference
IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems 2012
ISBN
978-1-4673-1185-4
Vydavatel
Institute of Electrical and Electronics Engineers
Místo
Tallinn
BibTeX
@inproceedings{BUT91511,
  author="Richard {Růžička} and Václav {Šimek}",
  title="NAND/NOR Gate Polymorphism in Low Temperature Environment",
  booktitle="Proceedings of the 2012 IEEE 15th International Symposium on Design and Diagnostics of Electronic Circuits & Systems",
  year="2012",
  pages="34--37",
  publisher="Institute of Electrical and Electronics Engineers",
  address="Tallinn",
  isbn="978-1-4673-1185-4"
}
Projekty
Centrum excelence IT4Innovations, MŠMT, Operační program Výzkum a vývoj pro inovace, ED1.1.00/02.0070, zahájení: 2011-01-01, ukončení: 2015-12-31, ukončen
Natural computing na nekonvenčních platformách, GAČR, Standardní projekty, GAP103/10/1517, zahájení: 2010-01-01, ukončení: 2013-12-31, řešení
Pokročilé bezpečné, spolehlivé a adaptivní IT, VUT, Vnitřní projekty VUT, FIT-S-11-1, zahájení: 2011-01-01, ukončení: 2013-12-31, ukončen
Výzkum informačních technologií z hlediska bezpečnosti, MŠMT, Institucionální prostředky SR ČR (např. VZ, VC), MSM0021630528, zahájení: 2007-01-01, ukončení: 2013-12-31, řešení
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