Ing.

Jakub Lojda

Ph.D.

vědecký pracovník

+420 54114 1361
ilojda@fit.vut.cz
L325 Kancelář
138606/osobní číslo VUT

Publikace

  • 2023

    LOJDA Jakub, PÁNEK Richard, SEKANINA Lukáš a KOTÁSEK Zdeněk. Automated Design and Usage of the Fault-Tolerant Dynamic Partial Reconfiguration Controller for FPGAs. Microelectronics Reliability, roč. 2023, č. 144, s. 1-16. ISSN 0026-2714.
    Detail

    PÁNEK Richard a LOJDA Jakub. The Fault-tolerant Single-FPGA Systems with a Self-repair Reconfiguration Controller. In: LASCAS 2023 - 14th IEEE Latin American Symposium on Circuits and Systems, Proceedings. Quito: Institute of Electrical and Electronics Engineers, 2023, s. 104-107. ISBN 978-1-6654-5705-7.
    Detail

  • 2021

    LOJDA Jakub, PODIVÍNSKÝ Jakub, ČEKAN Ondřej a KOTÁSEK Zdeněk. Accelerating Tests of Arithmetic Circuits Through On-FPGA Stimuli Generation and Their Reduction. In: International Conference on Electrical, Computer, Communications and Mechatronics Engineering, ICECCME 2021. Mauritius: Institute of Electrical and Electronics Engineers, 2021, s. 1628-1633. ISBN 978-1-6654-1262-9.
    Detail

    LOJDA Jakub, PÁNEK Richard a KOTÁSEK Zdeněk. Automatic Design of Fault-Tolerant Systems for VHDL and SRAM-based FPGAs. In: Proceedings - 2021 24th Euromicro Conference on Digital System Design, DSD 2021. Palermo: Institute of Electrical and Electronics Engineers, 2021, s. 549-552. ISBN 978-1-6654-2703-6.
    Detail

    LOJDA Jakub, PÁNEK Richard a KOTÁSEK Zdeněk. Automatically-Designed Fault-Tolerant Systems: Failed Partitions Recovery. In: 2021 IEEE East-West Design and Test Symposium, EWDTS 2021 - Proceedings. Batumi: Institute of Electrical and Electronics Engineers, 2021, s. 26-33. ISBN 978-1-6654-4503-0.
    Detail

    PÁNEK Richard, LOJDA Jakub, PODIVÍNSKÝ Jakub a KOTÁSEK Zdeněk. Reliability Analysis of the FPGA Control System with Reconfiguration Hardening. In: Proceedings - 2021 24th Euromicro Conference on Digital System Design, DSD 2021. Palermo: Institute of Electrical and Electronics Engineers, 2021, s. 553-556. ISBN 978-1-6654-2703-6.
    Detail

    LOJDA Jakub, PÁNEK Richard, PODIVÍNSKÝ Jakub, ČEKAN Ondřej, KRČMA Martin a KOTÁSEK Zdeněk. Testing Embedded Software Through Fault Injection: Case Study on Smart Lock. In: 2021 IEEE 22nd Latin American Test Symposium, LATS 2021. Punta del Este: Institute of Electrical and Electronics Engineers, 2021, s. 80-85. ISBN 978-1-6654-2057-0.
    Detail

  • 2020

    LOJDA Jakub, PÁNEK Richard, PODIVÍNSKÝ Jakub, ČEKAN Ondřej, KRČMA Martin a KOTÁSEK Zdeněk. Analysis of Software-Implemented Fault Tolerance: Case Study on Smart Lock. In: 2020 IEEE East-West Design and Test Symposium, EWDTS 2020 - Proceedings. Varna: Institute of Electrical and Electronics Engineers, 2020, s. 24-28. ISBN 978-1-7281-9899-6.
    Detail

    LOJDA Jakub, PODIVÍNSKÝ Jakub, ČEKAN Ondřej, PÁNEK Richard, KRČMA Martin a KOTÁSEK Zdeněk. Automatic Design of Reliable Systems Based on the Multiple-choice Knapsack Problem. In: Proceedings - 2020 23rd International Symposium on Design and Diagnostics of Electronic Circuits and Systems, DDECS 2020. Novi Sad: Institute of Electrical and Electronics Engineers, 2020, s. 1-4. ISBN 978-1-7281-9938-2.
    Detail

    PODIVÍNSKÝ Jakub, LOJDA Jakub, PÁNEK Richard, ČEKAN Ondřej, KRČMA Martin a KOTÁSEK Zdeněk. Evaluation Platform For Testing Fault Tolerance: Testing Reliability of Smart Electronic Locks. In: 2020 IEEE 11th Latin American Symposium on Circuits & Systems (LASCAS). San José: IEEE Circuits and Systems Society, 2020, s. 1-4. ISBN 978-1-7281-3427-7.
    Detail

    LOJDA Jakub, PÁNEK Richard, PODIVÍNSKÝ Jakub, ČEKAN Ondřej, KRČMA Martin a KOTÁSEK Zdeněk. Hardening of Smart Electronic Lock Software against Random and Deliberate Faults. In: Proceedings - Euromicro Conference on Digital System Design, DSD 2020. Kranj: Institute of Electrical and Electronics Engineers, 2020, s. 680-683. ISBN 978-1-7281-9535-3.
    Detail

    PÁNEK Richard, LOJDA Jakub, PODIVÍNSKÝ Jakub a KOTÁSEK Zdeněk. Reliability Analysis of Reconfiguration Controller for FPGA-Based Fault Tolerant Systems: Case Study. In: 2020 International Symposium on VLSI Design, Automation, and Test (VLSI-DAT) : proceedings of technical papers. Hsinchu: IEEE Computer Society, 2020, s. 121-124. ISBN 978-1-7281-6083-2.
    Detail

  • 2019

    KRČMA Martin, KOTÁSEK Zdeněk a LOJDA Jakub. Detecting hard synapses faults in artificial neural networks. In: 20th IEEE Latin American Test Symposium (LATS 2019). Santiago de Chile: IEEE Computer Society, 2019, s. 1-6. ISBN 978-1-7281-1756-0.
    Detail

    PODIVÍNSKÝ Jakub, LOJDA Jakub a KOTÁSEK Zdeněk. Extended Reliability Analysis of Fault-Tolerant FPGA-based Robot Controller. In: 20th IEEE Latin American Test Symposium (LATS 2019). Santiago: IEEE Computer Society, 2019, s. 97-100. ISBN 978-1-7281-1756-0.
    Detail

    LOJDA Jakub, PODIVÍNSKÝ Jakub a KOTÁSEK Zdeněk. Reliability Indicators for Automatic Design and Analysis of Fault-Tolerant FPGA Systems. In: 20th IEEE Latin American Test Symposium (LATS 2019). Santiago: IEEE Computer Society, 2019, s. 93-96. ISBN 978-1-7281-1756-0.
    Detail

    ČEKAN Ondřej, PODIVÍNSKÝ Jakub, LOJDA Jakub, PÁNEK Richard, KRČMA Martin a KOTÁSEK Zdeněk. Smart Electronic Locks and Their Reliability. In: Proceedings of the 7th Prague Embedded Systems Workshop. Roztoky u Prahy: České vysoké učení technické, 2019, s. 4-5. ISBN 978-80-01-06607-2.
    Detail

    ČEKAN Ondřej, PODIVÍNSKÝ Jakub, LOJDA Jakub, PÁNEK Richard, KRČMA Martin a KOTÁSEK Zdeněk. Testing Reliability of Smart Electronic Locks: Analysis and the First Steps Towards. In: Proceedings of the 2019 22nd Euromicro Conference on Digital System Design. Kalithea: Institute of Electrical and Electronics Engineers, 2019, s. 506-513. ISBN 978-1-7281-2861-0.
    Detail

  • 2018

    PODIVÍNSKÝ Jakub, LOJDA Jakub a KOTÁSEK Zdeněk. An Experimental Evaluation of Fault-Tolerant FPGA-based Robot Controller. In: Proceedings of IEEE East-West Design & Test Symposium. Kazan: IEEE Computer Society, 2018, s. 63-69. ISBN 978-1-5386-5710-2.
    Detail

    LOJDA Jakub a KOTÁSEK Zdeněk. Automatizace návrhu spolehlivých systémů a její dílčí komponenty. In: Počítačové architektury & diagnostika 2018. Stachy: Západočeská univerzita v Plzni, 2018, s. 5-8. ISBN 978-80-261-0814-6.
    Detail

    PODIVÍNSKÝ Jakub, LOJDA Jakub, ČEKAN Ondřej a KOTÁSEK Zdeněk. Evaluation Platform for Testing Fault Tolerance Properties: Soft-core Processor-based Experimental Robot Controller. In: Proceedings of the 2018 21st Euromicro Conference on Digital System Design. Praha: IEEE Computer Society, 2018, s. 229-236. ISBN 978-1-5386-7376-8.
    Detail

    LOJDA Jakub a KOTÁSEK Zdeněk. Fault Tolerance in HLS for the Purposes of Reliable System Design Automation. In: Proceedings of the 6th Prague Embedded Systems Workshop. Roztoky u Prahy: Fakulta informačních technologií ČVUT, 2018, s. 31-32. ISBN 978-80-01-06456-6.
    Detail

    LOJDA Jakub, PODIVÍNSKÝ Jakub a KOTÁSEK Zdeněk. Fault Tolerance Properties of Systems Generated with the Use of High-Level Synthesis. In: Proceedings of IEEE East-West Design & Test Symposium. Kazan: IEEE Computer Society, 2018, s. 80-86. ISBN 978-1-5386-5710-2.
    Detail

    PODIVÍNSKÝ Jakub, LOJDA Jakub a KOTÁSEK Zdeněk. FPGA-based Robot Controller: An Experimental Evaluation of Fault Tolerance Properties. In: INFORMAL PROCEEDINGS 21st IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems. Budapešť, 2018, s. 9-12.
    Detail

    LOJDA Jakub, PODIVÍNSKÝ Jakub, ČEKAN Ondřej, PÁNEK Richard a KOTÁSEK Zdeněk. FT-EST Framework: Reliability Estimation for the Purposes of Fault-Tolerant Systems Design Automation. In: Proceedings of the 2018 21st Euromicro Conference on Digital System Design. Praha: IEEE Computer Society, 2018, s. 244-251. ISBN 978-1-5386-7376-8.
    Detail

    LOJDA Jakub, PODIVÍNSKÝ Jakub, KOTÁSEK Zdeněk a KRČMA Martin. Majority Type and Redundancy Level Influences on Redundant Data Types Approach for HLS. In: 2018 16th Biennial Baltic Electronics Conference (BEC). Tallinn: IEEE Computer Society, 2018, s. 1-4. ISBN 978-1-5386-7312-6.
    Detail

    PÁNEK Richard, LOJDA Jakub, PODIVÍNSKÝ Jakub a KOTÁSEK Zdeněk. Partial Dynamic Reconfiguration in an FPGA-based Fault-Tolerant System: Simulation-based Evaluation. In: Proceedings of IEEE East-West Design & Test Symposium. Kazaň: IEEE Computer Society, 2018, s. 129-134. ISBN 978-1-5386-5710-2.
    Detail

  • 2017

    LOJDA Jakub a KOTÁSEK Zdeněk. A Basic Approach to Fault Tolerance of Data Paths of HLS-synthesized Systems and its Evaluation. In: Proceedings of the 5th Prague Embedded Systems Workshop. Roztoky u Prahy: Fakulta informačních technologií ČVUT, 2017, s. 79-80. ISBN 978-80-01-06178-7.
    Detail

    LOJDA Jakub a KOTÁSEK Zdeněk. Automatizace návrhu systémů odolných proti poruchám pomocí vysokoúrovňové syntézy. In: Počítačové architektury & diagnostika 2017. Smolenice: Slovenská technická univerzita v Bratislavě, 2017, s. 59-62. ISBN 978-80-972784-0-3.
    Detail

    KRČMA Martin, KOTÁSEK Zdeněk a LOJDA Jakub. Comparison of FPNNs Models Approximation Capabilities and FPGA Resources Utilization. In: Proceedings of IEEE 13th International Conference on Intelligent Computer Communication and Processing. Cluj-Nappoca: IEEE Computer Society, 2017, s. 125-132. ISBN 978-1-5386-3368-7.
    Detail

    LOJDA Jakub, PODIVÍNSKÝ Jakub, KOTÁSEK Zdeněk a KRČMA Martin. Data Types and Operations Modifications: a Practical Approach to Fault Tolerance in HLS. In: Proceedings of IEEE East-West Design & Test Symposium. Novi Sad: IEEE Computer Society, 2017, s. 273-278. ISBN 978-1-5386-3299-4.
    Detail

    PODIVÍNSKÝ Jakub, ČEKAN Ondřej, LOJDA Jakub, ZACHARIÁŠOVÁ Marcela, KRČMA Martin a KOTÁSEK Zdeněk. Functional Verification Based Platform for Evaluating Fault Tolerance Properties. Microprocessors and Microsystems, roč. 52, č. 5, 2017, s. 145-159. ISSN 0141-9331.
    Detail

    LOJDA Jakub, PODIVÍNSKÝ Jakub a KOTÁSEK Zdeněk. Redundant Data Types and Operations in HLS and their Use for a Robot Controller Unit Fault Tolerance Evaluation. In: Proceedings of IEEE East-West Design & Test Symposium. Novi Sad: IEEE Computer Society, 2017, s. 359-364. ISBN 978-1-5386-3299-4.
    Detail

    PODIVÍNSKÝ Jakub, LOJDA Jakub, ČEKAN Ondřej, PÁNEK Richard a KOTÁSEK Zdeněk. Reliability Analysis and Improvement of FPGA-based Robot Controller. In: Proceedings of the 2017 20th Euromicro Conference on Digital System Design. Vídeň: IEEE Computer Society, 2017, s. 337-344. ISBN 978-1-5386-2145-5.
    Detail

    KRČMA Martin, LOJDA Jakub a KOTÁSEK Zdeněk. Triple Modular Redundancy Used in Field Programmable Neural Networks. In: Proceedings of IEEE East-West Design & Test Symposium. Novi Sad: IEEE Computer Society, 2017, s. 1-6. ISBN 978-1-5386-3299-4.
    Detail

  • 2016

    LOJDA Jakub a KOTÁSEK Zdeněk. A Systematic Approach to the Description of Fault-tolerant Systems. Proceedings of the 4th Prague Embedded Systems Workshop. Roztoky u Prahy, 2016.
    Detail

    KRČMA Martin, KOTÁSEK Zdeněk, LOJDA Jakub a KAŠTIL Jan. Comparison of FPNNs Approximation Capabilities. In: Proceedings of the Work in progress Session held in connection with DSD 2016. Limassol: Johannes Kepler University Linz, 2016, s. 1-2. ISBN 978-3-902457-46-2.
    Detail

    PODIVÍNSKÝ Jakub, ČEKAN Ondřej, LOJDA Jakub a KOTÁSEK Zdeněk. Functional Verification as a Tool for Monitoring Impact of Faults in SRAM-based FPGAs. In: Proceedings of the 2016 International Conference on Field Programmable Technology. Xi'an: IEEE Computer Society, 2016, s. 293-294. ISBN 978-1-5090-5602-6.
    Detail

    LOJDA Jakub, PODIVÍNSKÝ Jakub, KRČMA Martin a KOTÁSEK Zdeněk. HLS-based Fault Tolerance Approach for SRAM-based FPGAs. In: Proceedings of the 2016 International Conference on Field Programmable Technology. Xi'an: IEEE Computer Society, 2016, s. 301-302. ISBN 978-1-5090-5602-6.
    Detail

    KRČMA Martin, KOTÁSEK Zdeněk a LOJDA Jakub. Implementation of Fault Tolerant Techniques into FPNNs. In: Proceedings of the 2016 International Conference on Field Programmable Technology. Xi'an: IEEE Computer Society, 2016, s. 297-298. ISBN 978-1-5090-5602-6.
    Detail

    PODIVÍNSKÝ Jakub, ČEKAN Ondřej, LOJDA Jakub a KOTÁSEK Zdeněk. Verification of Robot Controller for Evaluating Impacts of Faults in Electro-mechanical Systems. In: Proceedings of the 19th Euromicro Conference on Digital Systems Design. Limassol: IEEE Computer Society, 2016, s. 487-494. ISBN 978-1-5090-2816-0.
    Detail

Nahoru